Senior High-Speed SerDes Design Architect
16 hours ago
System-Level Architect Job Description Overview
We are seeking a highly experienced System Level Architect to lead our Enterprise Serdes team in designing and developing 100Gbps NRZ and PAM4 serial-link transceivers. The successful candidate will focus on PCIe and Ethernet protocols, ensuring high-performance and reliability.
Key Responsibilities
- Architecture Development: Define specifications for transmitter and receiver architectures, considering signal integrity and power requirements.
- Modeling and Simulation: Design and maintain system-level models in Matlab/Simulink/C, analyzing performance and behavior under various conditions.
- Signal Integrity Analysis: Investigate and resolve signal integrity issues, collaborating with cross-functional teams.
- Performance Qualification: Validate design performance against silicon implementation, identifying areas for improvement.
- Customer Support: Assist customers in resolving system-level performance and algorithmic issues.
Required Qualifications
- A Master's or PhD degree in Electrical or Computer Engineering.
- Extensive experience in Matlab/Simulink/C modeling, communications theory, digital signal processing, or high-speed analog CMOS circuit design.
- Familiarity with SERDES transmitters and receivers modeling, circuit topologies, Tx/Rx equalization techniques, and CDR architectures.
- Knowledge of common high-speed serial data protocols and hands-on experience in lab testing of high-speed serial links.
Compensation and Benefits
The estimated salary for this position is $150,000 - $200,000 per year, depending on qualifications and location. Synopsys Canada ULC offers a comprehensive benefits package, including health, dental, and vision coverage, as well as a retirement savings plan.
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