Digital Design Lead for High-Speed ASICs
1 week ago
Are you an innovative digital design engineer with a passion for high-speed ASICs? We're seeking a highly motivated individual to join our team as a Senior ASIC Digital Design Engineer for Performance Optimization. In this role, you will work closely with our experienced team of digital and mixed-signal engineers to develop high-end mixed-signal designs (PAM4- and NRZ-based SerDes PHY products) from specification development to performing functional and performance tests on test-chips.
Key Responsibilities:
- Develop and implement high-speed digital and mixed-signal ASIC designs
- Collaborate with cross-functional teams to deliver design specifications and perform functional and performance tests
- Apply strong scripting expertise in Shell, Perl, Python, etc. to automate design tasks
- Stay up-to-date with industry trends and best practices in digital signal processing and high-speed SerDes PHY design
Requirements:
- Relevant ASIC digital design experience in the industry
- Strong theoretical and practical background in high-speed serializer and data recovery circuits is an asset
- BSEE or MSEE plus a minimum of 3+ years of digital design and verification experience in the industry
- Good organization and communication skills for interacting between different design groups and/or customers
What We Offer:
- Collaborative and dynamic work environment
- Opportunity to gain industry leading-edge knowledge and contribute to the development of next-generation flagship products
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