Senior RTL Design Engineer

3 weeks ago

Vancouver, British Columbia, Canada Advanced Micro Devices Full time
Transform Lives with AMD Technology

We are passionate about enriching our industry, communities, and the world with innovative computing experiences. Our mission is to build great products that accelerate next-generation computing, from data centers to PCs, gaming, and embedded systems.

Memory IO Team Opportunity

We are seeking experienced RTL design engineers to join our Memory IO team. As a key member, you will be responsible for the development of high-speed LPDDRx, DDRx, and associated ownership and development of DDR Subsystems. This role includes defining product features and capabilities, driving technical specifications for SoC and IP blocks, and providing technical direction to execution teams.

Key Responsibilities
  • Define product features and capabilities, close architecture, and micro-architecture requirements
  • Drive technical specifications for SoC and IP blocks to meet requirements
  • Provide technical direction to execution teams
  • Work cross-functionally with IP/Domain architects to identify and assess complex technical issues/risks
  • Develop architectural solutions to achieve product requirements
  • Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution, and Performance/Power Verification sign offs
Requirements
  • Excellent knowledge of System Verilog and Verilog language with respect to RTL design
  • Advanced DDR subsystem architecture, microarchitecture, development, and implementation experience
  • Development and maintenance of DDR Subsystem integration, documentation, timing, and floor planning through the lifecycle of pre-silicon development
  • Strong understanding of synchronization techniques (handshakes, message passing)
  • Clock domain crossing implementation experience
  • Outstanding foundation in Systems & SoC architecture, with expertise in Memory sub-system, Fabrics, CI/O subsystems, Clocks, Resets, and Security
  • Experience analyzing System-level Micro-Architectural features to identify performance bottlenecks within different workloads
  • Demonstrated expertise in power management microarchitecture, low power design, and power optimization
  • Experience with DDR/JEDEC standard IP, DDR PHY, or Memory Controller RTL design and development
  • UPF experience and knowledge of power supply implementations across subsystems and writing logic and timing constraints to handle clock domain crossings
Academic Credentials
  • Bachelor's degree in Electrical or Computer Engineering and relevant experience
  • Master's or PhD degree in Electrical or Computer Engineering with relevant experience

We are an equal opportunities employer and welcome applications from diverse candidates. If you are passionate about transforming lives with AMD technology, please submit your application.

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