Digital Verification Engineer-Lead Role

3 weeks ago

Montreal, Quebec, Canada https:www.energyjobline.comsitemap Full time

Job Title: Staff Digital Verification Engineer-Lead Role

Job Summary:

We are seeking a highly skilled Staff Digital Verification Engineer-Lead Role to join our team in Ottawa. As a key member of our design and verification team, you will be responsible for developing industry-leading mixed-signal Application Specific Integrated Circuits in a flexible work environment.

Key Responsibilities:

  1. Verification of mixed-signal ASICs in a SV UVM environment.
  2. Implementing test cases based on functional specifications and test plans.
  3. RTL and possibly Gate level debug of mixed-signal ASICs.
  4. Implementing functional coverage and aiding designers in reviewing code coverage.
  5. Lead the Verification of a small project.
  6. Mentor less experienced engineers.

Requirements:

  1. Bachelor's degree or equivalent technical degree in Electrical/Computer/Software Engineering.
  2. 8+ years of practical design verification experience using SystemVerilog UVM and ASIC verification.
  3. Experience with functional coverage driven verification sign-off.
  4. Experience contributing to verification plans.

Preferred Skills:

  1. Knowledge of PLLs.
  2. Experience with Synopsys and/or Cadence simulation tools.
  3. Ability to work in a Unix/Linux operating system environment.
  4. Knowledge of scripting languages such as Python or equivalent.
  5. Experience with mixed-signal design modelling and debugging.

About Us:

We are a leading company in the field of energy and technology, and we are committed to providing our employees with a challenging and rewarding work environment. If you are a motivated and experienced verification engineer looking for a new challenge, please submit your application.

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