Senior Analog Circuit Design Engineer

Ciena is committed to our people-first philosophy. Our teams enjoy a culture focused on prioritizing a personalized and flexible work environment that empowers an individual’s passions, growth, wellbeing and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

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Why Ciena:

You will be a member of a successful team working on the forefront of technological innovation focused on leading-edge technologies, flows and products. You will be working with, and learning from, industry-recognized experts.

Our team supports an inclusive, diverse and barrier-free work environment making for empowered and committed employees.

We recognize the importance of well-being and offer programs and benefits to support and sustain the mental and physical health of our employees and their families.

Great work deserves recognition. We have a robust recognition program, with ongoing and enhanced awards for exemplary performance.

How You Will Contribute:

The Wavelogic family of products is widely used in Ciena's optical fiber transmission solutions and is one of the main contributors to Ciena's success in the telecommunications industry. Successful candidates will be joining a vibrant team with a proven track record of success over 30 years of evolution and revolution in the advancement of high-speed circuits used in broadband fiber-optic modems. This team pioneered the introduction of the world’s first high-speed DAC and ADC analog macros that ushered in the era of coherent fiber-optic product solutions.

Reporting to the Senior Director of Analog Engineering , as a Senior Analog Circuit Design Engineer /Architect in looking for novel ways to advance our designs along several dimensions including lower power, higher performance, more compact implementation and/or higher baud rate by leveraging advanced CMOS and/or BiCMOS technologies. Your role will be hands-on to architect and direct feasibility studies in advanced high-speed circuits within a larger team who are responsible for a full mixed signal IP block solution that will be integrated into the Wavelogic family of products. These analog macros include the design and delivery of electrical interface-facing DAC and ADC-based SERDES solutions for 112G and 224G, optical-line-facing high-speed DAC and ADC circuits interfacing with optical modulators and detectors, transimpedance amplifiers, modulator driver circuits, and critical precision analog circuits for control and monitoring functions, etc.

In this role:

You will be responsible for architecting circuit solutions and performing feasibility work to recommend the best solution to carry through implementation by weighing tradeoffs and discussing these with other members of the team including system groups to guide the formation of a circuit requirement specification.

You will be well versed with the system tradeoffs and details at a sufficient proficiency of the overall problem that needs to be solved to meet the market or customer objective.

Reporting on status updates regularly, participating in team meetings and sharing of experiences with the rest of the team. Able to produce clear and articulate presentations for senior management.

Close interactions with allied teams in optical design, packaging design, DSP and system design.

What Does Ciena Expect of You:

Sense of urgency and accountability – what’s important to the customer is important to you; you make getting things done a priority.

Detail-oriented – you will deliver on objectives through meticulous, thorough, and comprehensive work.

Problem solver – you possess the ability to analyze and methodically solve complex technical problems using engineering principles and approaches.

Commitment to learning – you keep abreast of technology developments and are keen to share your knowledge with others.

The Must Haves:

Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc, MEng/MSc, or PhD level.

Demonstrated experience as a high-speed analog circuit architect with knowledge of the capabilities of the latest and emerging BiCMOS and/or CMOS technology with a minimum of 10 years of industrial experience.

Proficiency with the use of applicable design tools from Cadence, Mentor and Synopsys for analog design (e.g. Virtuoso, Calibre, STAR-RC, MMSIM).

A highly motivated self-starter, able to work independently, while being a great teammate.

Excellent organization, written and oral (English) interpersonal skills.

A history of successful analog circuit product deliveries based upon architectures that were delivered.

Ability to methodically address sophisticated technical problems with solutions that balance tradeoffs across many domains to best meet customer requirements.

Assets:

Experience with team leadership within an analog macro design group.

Experience formulating solutions taking into consideration business and economic factors.

Experience sizing risk and design effort estimates for new architectures.

Architect or System Design experience for complex analog macro-IP solutions using tools such as MATLAB and/or C++.

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