Principal Analog Design Engineer

2 weeks ago


Mississauga, Ontario, Canada Synopsys Full time

Job Summary

We're seeking a highly skilled Principal Analog Design Engineer to join our team at Synopsys. This role will involve working on the design, development, and refinement of high-speed analog integrated circuits in the latest Fin FET process nodes.

In this position, you will be part of a fast-growing analog and mixed-signal R&D team developing innovative solutions for our customers. You will work with a cross-functional design team of analog and digital designers to identify potential circuit architectures and successful design strategies.

Key Responsibilities

  • Develop novel transceiver architectures and sub-block specifications based on Ser Des standards.
  • Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets.
  • Streamline design and verification strategies to ensure overall design quality, efficiency, and performance.
  • Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.
  • Present and review simulation data from internal project teams and present results externally at industry panels or at customer reviews.
  • Document design features and test plans.
  • Consult on the overall electrical characterization of the Ser Des IP product and analyze customer silicon data for design enhancements.

Requirements

  • PhD with 10+ years or MSc with 12+ years of practical analog IC design experience in Electrical Engineering or Computer Engineering.
  • Experience with Fin FET technologies.
  • Extensive design experience with sub-circuits relevant to Ser Des, including equalizers, DAC-based transmitters, ADC-based receivers, and high-speed clocking circuits.
  • In-depth familiarity with transistor-level circuit design, CMOS design fundamentals, and experience with CMOS tape-outs.
  • Knowledge of Ser Des, circuit, and fabrication issues that directly impact customer use-cases.
  • Awareness of ESD issues and familiarity with custom digital design.
  • Experience with analog/digital interactions for optimizing circuit performance and knowledge of design for reliability and layout effects.
  • Experience with tools for schematic entry, physical layout, and design verification.
  • Knowledge of SPICE simulators and simulation methods.
  • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
  • Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired.


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