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Senior Backend Design Engineer for Mixed-Signal IP
2 months ago
Company Overview
Synopsys, Inc. is a leader in electronic design automation (EDA) and intellectual property (IP). Our silicon IP business offers a broad portfolio of predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors to help customers integrate more capabilities into an SoC—faster.
Estimated Salary
$140,000 - $200,000 per year, depending on experience and location.
Job Description
We are seeking a Senior Backend Design Engineer for our Mixed-Signal IP team. The ideal candidate will have experience in back-end ASIC development flows and specialization in one or more of the following areas: ATPG/DFT, Static Timing Analysis and timing budgeting, Synthesis, Lint/CDC, and Place and Route.
The diversity of tasks allows each team member to develop new skills and learn about all aspects of PHY design. The main focus of the team is to support application engineers in solving customer problems, usually requiring deep investigations into the design. The successful candidate will participate in the generation of data books, application notes, and white papers, and perform constraint development and physical design activities.
Required Skills and Qualifications
- BSEE degree or Applied Science degree (or equivalent) with 5+ years of related experience
- Excellent communication and presentation skills
- Experience with HBM or DDR protocols is a definite asset but not mandatory
Benefits
We offer a comprehensive benefits package, including medical, dental, and vision insurance, 401(k) matching, and paid time off. We also provide opportunities for professional growth and development, as well as a dynamic and inclusive work environment.
Location
This role is based in the United States, with potential for remote work arrangements.
