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Senior ASIC Digital Design Engineer

2 months ago

Ottawa, Ontario, Canada Synopsys, Inc. Full time
About the Role

Synopsys, Inc. is a leading provider of electronic design automation (EDA) software and intellectual property (IP) solutions. We are seeking a highly skilled Senior ASIC Digital Design Engineer to join our DDR PHY IP team.

Key Responsibilities
  • Contribute to the design specification, development, and productization of DDR PHY IP solutions.
  • Collaborate with cross-functional teams to ensure timely delivery of high-quality designs.
  • Develop and implement complex digital design concepts and implementation using synthesizable Verilog and System Verilog.
  • Apply front-end design flows, including linting, synthesis, timing investigation and closure, cross-domain clocking, DFT, and power optimization techniques.
  • Provide customer support for DDR PHY IP solutions integrated into SoCs.
Requirements
  • BS/MS in Electrical Engineering or related field.
  • At least 2 years of experience in complex technical development.
  • Experience with synthesizable Verilog and System Verilog design concepts and implementation.
  • Knowledge of front-end design flows, including linting, synthesis, timing investigation and closure, cross-domain clocking, DFT, and power optimization techniques.
About Synopsys

Synopsys is a global leader in EDA software and IP solutions. We empower designers and engineers to create innovative, high-performance electronic systems that transform industries and improve lives. Join our team and be part of shaping the future of electronic design and innovation.