Senior ASIC Design Verification Expert
1 week ago
At Synopsys, we're shaping the future of innovation. As a Senior Design Verification Engineer, you'll be at the forefront of designing and verifying advanced silicon chips. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We're the world's leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.
Job Summary
Senior ASIC Design Verification Engineer - Our DDR PHY IP team is seeking a skilled Senior Design Verification Engineer. In this role, you'll be responsible for developing test benches and verifying integrated IP Subsystems for our global customers. You will triage issues by working independently with architects and RTL designers while providing technical leadership on verification from initial specification to tape out.
Requirements:
- BSEE in EE with 3+ years of industry experience or MSEE with 2 years
- Verilog, System Verilog, and Perl/Python scripting skills
- Proficiency in UVM verification environment
- Debugging skills with ability to root cause issues
- Demonstrates good communication and problem-solving skills
- Experience in DFI, DDR PHY, or Memory subsystem is a plus
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