Senior FPGA Design Engineer
22 hours ago
Responsibilities
• Lab test (component characterization, test ) .Generating report on the lab test
• Design and Verification of FPGAs with Verilog/VHDL
• Optimizing FPGA code to minimize resources .
• Verification of FPGAs using latest tools, etc.
• Debug FPGA issues on the hardware platform.
• Invent, document, and implement micro-architecture and design details for new product features.
• Physical implementation in FPGA targets for emulation; timing closure, debug.
• Integrating processor based SOC (Target ASIC or FPGA).
QUALIFICATIONS:
• Experience with Hardware-based integration and test of ASIC/FPGA designs
• Professional experience with hardware-based integration and test of ASIC/FPGA designs
• Proven record of working ASIC/FPGA design and/or verification teams, including tracking and reporting progress to stakeholders
• Experience with hardware emulators
• Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
• Ability to create test plans and self-checking and reusable testbenches from scratch
• Experience developing Functional Coverage Models and Closing Code Coverage
• Revision Control Systems: svn, cvs, git
• Experience with Xilinx FPGA tools (Vivado, Vitis, HLS), embedded software development, FPGA logic design (VHDL/Verilog).
• Familiarity with Ethernet networking, data interfaces, and Xilinx architecture/platforms.
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