lancesoft jobs in Ottawa

RTL/FPGA Design Engineer Project Duration: 12 Months + chances of further extension. Base pay range CA$110.00/hr - CA$135.00/hr Job Description Digital ASIC/FPGA Designer with at least 15 years of experience and a bachelor’s degree in engineering or computer science. Experience in front-end ASIC design EDA flows including: Synopsys Design/Fusion...

RTL/FPGA Design Engineer Project Duration: 12 Months + chances of further extension. Base pay range CA$110.00/hr - CA$135.00/hr Job Description Digital ASIC/FPGA Designer with at least 15 years of experience and a bachelor’s degree in engineering or computer science. Experience in front-end ASIC design EDA flows including: Synopsys Design/Fusion Compiler,...

A leading semiconductor company is seeking an RTL/FPGA Design Engineer with over 15 years of experience. The ideal candidate should have a bachelor's degree in engineering or computer science and possess excellent skills in RTL design using Verilog and System Verilog. Key responsibilities include working with EDA tools and knowledge of networking standards....

A leading semiconductor company is seeking an RTL/FPGA Design Engineer with over 15 years of experience. The ideal candidate should have a bachelor's degree in engineering or computer science and possess excellent skills in RTL design using Verilog and System Verilog. Key responsibilities include working with EDA tools and knowledge of networking standards....