Principal Engineer

Principal Engineer - CAD Physical Verification page is loaded## Principal Engineer - CAD Physical Verificationlocations: Canada - Ottawa - March Roadtime type: Full timeposted on: Posted Todayjob requisition id: R3-26People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the *Aggregate System* and it’s won us countless awards for diversity and workplace excellence.Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.Visit our page to see what exciting opportunities and company await**Job Description:**The CAD group at Microchip offers global support for multiple technology nodes and tools used in product development providing innovative solutions for the design community. The candidate will focus on flow development and support for back end physical verification. If you have a solid software background and are interested in supporting semiconductor chip design, this maybe the job for you.Expertise using Siemens Calibre and/or Cadence Pegasus DRC, LVS and PERC tools is paramount. Candidate should not only know how to run the tools and debug results, but also have strengths in developing the verification run decks and in automating flow/procedures.An overall strong understanding in both the digital and analog sides of design is important to be effective, since development and support work will span a variety of design styles. Additionally, both circuit/electrical and layout/physical knowledge is important.**The candidate will:*** Develop physical verification regression test cases to QA physical verification decks* Support Layout and Design engineers with physical verification activities using verification tools such as Siemens Calibre, Cadence Pegasus, or Synopsys Hercules* Utilize Knowledge of advanced EDA methods to support ESD, ERC, Voltage-Aware DRC, via doubling methodologies, etc.* Work with Technology Development and Device Engineering to develop DRC rules, additional devices, and design for manufacturability checks* Develop rule decks as needed to support flow* Verify and enhance foundry rule decks* Support remote sites worldwide with layout verification activities* Support debug of physical verification issues* Work as a member of team to develop flows to improve quality and reliability of devices**The tasks this candidate will be assigned depends on their experience. There are several areas in which we are shorthanded. Potential task assignments would include:*** Building of regression test cases for several PDKs of various process technologies* Supporting 4nm to 600nm PDKs from TSMC, Global Foundries, Vanguard, Dongbu, Magnachip, etc.* Calibre/Pegasus PERC – several PDKs still require PERC setup.**Requirements/Qualifications:*** 8+ years developing and supporting physical verification activities* In depth knowledge of Calibre DesignRev scripting* Fluent with SVRF and TVF* Accomplished at debugging PV issues with RVE, Vue or other EDA visualizer* Familiar with customizing Calibre Interactive Skilled with Tcl/Tk, Perl, Python, and other programming languages, inside and outside of EDA tools* Solid knowledge of layout rules and concepts, device identification concepts, and foundry rules* Strong knowledge of Design for Manufacturing solutions affecting quality, reliability, and yield of designs* Prefer extensive knowledge of Calibre/Pegasus/Hercules syntax and semantics, or similar layout verification tool* Strong knowledge of Cadence Virtuoso and/or CalibreDRV* Prefer Extraction, Reliability and Dynamic Noise related knowledge* Excellent verbal and written communication and interpersonal skills**Travel Time:**0% - 25%**Pay Range:**We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:The annual base salary range for this position is $107,000 - $157,000.\*\*Range is dependent on numerous factors including job location, skills and experience.**Ontario Accommodation:**Your accessibility is important to us. If you would like to contact us about our website or need help completing the application process, please email us at accordance with applicable laws (including human rights and accessibility legislation in Ontario), accommodation will be provided in all parts of the hiring process. Let us know what type of accommodations you require to help remove barriers so that you can participate throughout the interview process.This contact information is for accommodation requests only and cannot be used to inquire about the status of applications.**To all recruitment agencies**: *Microchip Technology Inc. **does not** accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.*At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission.#J-18808-Ljbffr