Silicon Verification Engineer at AMD SOC
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This exciting role involves collaborating with experienced verification engineers. You will create test benches utilizing System Verilog and UVM, facilitating system-wide verification in a dynamic environment. Your work will include designing constrained-random verification scenarios and collaborating with RTL engineers to optimize logic design for improved efficiency.
Key Responsibilities: • Develop comprehensive test plans for complex IP • Design and implement testbenches in System Verilog • Enhance verification environments using formal tools • Coordinate with design engineers for debug processes • Track and analyze verification quality metrics
Requirements: • Bachelor’s or Master’s degree in relevant fields • Strong foundation in computer architecture and digital design • Hands-on experience in System Verilog, C++, and Python • Familiarity with UVM-based verification methodologies • Previous experience in protocols like PCIe is a plus
Utilize your analytical skills in silicon verification at AMD, driving innovation in technology.
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