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Senior ASIC Digital Design Engineer
1 month ago
Synopsys is a leading provider of electronic design automation (EDA) software and intellectual property (IP) solutions. We empower engineers to create innovative, high-performance designs that drive the world's most advanced technologies.
Job SummaryWe are seeking a highly skilled Senior ASIC Digital Design Engineer to join our DDR PHY IP team. As a key member of our team, you will be responsible for designing and developing high-performance, low-power DDR PHY IP solutions.
Key Responsibilities- Design and develop synthesizable Verilog and System Verilog designs
- Implement front-end design flows, including linting, synthesis, timing investigation and closure, cross-domain clocking, DFT, and power optimization techniques
- Collaborate with cross-functional teams to ensure design specifications are met
- Provide customer support for DDR PHY IP solutions
- BS/MS in Electrical Engineering
- At least 2 years of experience in complex technical development
- Experience with synthesizable Verilog and System Verilog design concepts and implementation
This is an exciting opportunity to join a global diverse team that pushes boundaries on DDR PHY IP development and solutions. As a Senior ASIC Digital Design Engineer, you will contribute to all phases of designs of DDR PHY IP from design specification to productization.
Our team is passionate about innovation and performance, and we are looking for someone who shares our values and is eager to make a meaningful impact.