Senior ASIC Digital Design Manager
4 weeks ago
Synopsys is at the forefront of advanced silicon design, supplying essential tools and intellectual properties to enable semiconductor design, verification, and production. We're powering the state-of-the-art design market with the world's most advanced technologies for chip design and software security.
Key Responsibilities
As an ASIC Digital Design Manager, you will contribute to all phases of DDR PHY IP design development from specification to productization. You will manage a team of design engineers and work with the Architect, Verification, Physical implementation, and Firmware teams. Your expertise will shape the next generation of product innovation, performance, and efficiency.
Requirements
BS/MS in Electrical Engineering with at least 6 years of experience in complex technical development. 2 years of experience in people management, developing employees. Experience with synthesizable Verilog and System Verilog design concepts and implementation. Excellent communication skills and self-motivation are essential. Understanding of DDR memory and DDRPHY architecture is a plus.
About Synopsys Canada ULC
At Synopsys Canada ULC, we value diversity and are committed to providing access and opportunity to individuals with disabilities. We will provide reasonable accommodation to individuals throughout the recruitment and employment process. If you require an accommodation, please contact hr-help-canada@synopsys.com.
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