ASIC Physical Design, Staff Engineer
2 days ago
Category Engineering Hire Type Employee Job ID 7008 Remote Eligible No Date Posted 16/10/2024 ASIC Physical Design Engineer, S taff
Seeking a highly motivated and innovative Physical Design Implementation Engineer for the Test Chip PHY team.
Does this sound like a good role for you?
The candidate will lead a team of engineers to develop a Test Chip PHY IP for DDR/HBM/UCIe protocols. The position offers an excellent opportunity to work on mixed-signal IPs with focus on digital design.
Tasks will include but not be limited to, RTL synthesis, creating floor plans, running Place & Route/CTS flows using Synopsys tools, checking design equivalency, performing Static Timing Analysis and timing closure ECOs, constraints development, static and dynamic IR drop analysis, power estimation, electromigration checks and other verifying the test-chips for DRC/LVS/ERC/PERC checks.
Additional tasks will include creation of views necessary for Test Chip tapeout, conducting mock tapeouts and running all required QA checks before release of these views. The candidate will work independently to find solutions to complex design implementation issues and to suggest improvements to the design methodology and design flows
Key Requirements
Requires a degree in Electrical/Electronics Engineering (or equivalent) and 8+ years working experience in a related field.
Previous experience of leading a project as Technical Lead .
Previous experience with Physical Design of SOCs or IPs with ability to handle broad responsibility from RTL to signoff of Digital ASIC Test Chip designs.
Prior knowledge and experience with state-of-the-art CAD tools (DC, PT, ICC2/FC, ICV) and technologies (FinFet) is required.
Previous experience of working on RTL synthesis, SDCs and timing signoff using PTSI, RDL, Bump Map integration, ESD, Chip finishing is required.
Experience with solving Physical Verification (DRC, LVS, Antenna, etc) violations, understanding of DFT implementation techniques, resolving signal and power integrity faults.
Ability to resolve a wide range of issues in creative ways on a regular basis
Excellent communication skills, verbal and written, and awareness of project management issues
Should be authorized to work in Canada
Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.
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ASIC Physical Design, Staff Engineer
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National Capital Region (Almonte), Canada Synopsys Full timeCategoryEngineeringHire TypeEmployeeJob ID7008Remote EligibleNoDate Posted16/10/2024ASIC Physical Design Engineer, Staff Seeking a highly motivated and innovative Physical Design Implementation Engineer for the Test Chip PHY team. Does this sound like a good role for you?The candidate will lead a team of engineers to develop a Test Chip PHY IP for...
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ASIC Physical Design, Staff Engineer
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almonte, Canada Synopsys Full timeCategory Engineering Hire Type Employee Job ID 7008 Remote Eligible No Date Posted 16/10/2024 ASIC Physical Design Engineer, S taffSeeking a highly motivated and innovative Physical Design Implementation Engineer for the Test Chip PHY team.Does this sound like a good role f
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