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Senior Analog Circuit Design Engineer

2 months ago

Ottawa, Ontario, Canada Ciena Full time
About Ciena

Ciena is a technology company that prioritizes its people-first philosophy, fostering a culture that empowers individual passions, growth, wellbeing, and belonging. Our teams enjoy a personalized and flexible work environment that drives business priorities alongside meaningful social, community, and societal impact.

Why Ciena?
  • We offer a dynamic work environment where you'll be part of a successful team working on leading-edge technologies, flows, and products.
  • Our inclusive, diverse, and barrier-free work environment supports empowered and committed employees.
  • We recognize the importance of well-being and offer programs and benefits to support and sustain the mental and physical health of our employees and their families.
  • We have a robust recognition program with ongoing and enhanced awards for exemplary performance.
How You Will Contribute

The Wavelogic family of products is widely used in Ciena's optical fiber transmission solutions and is a key contributor to Ciena's success in the telecommunications industry. As a Senior Analog Circuit Design Engineer/Architect, you will join a vibrant team with a proven track record of success over 30 years of evolution and revolution in the advancement of high-speed circuits used in broadband fiber-optic modems.

This team pioneered the introduction of the world's first high-speed DAC and ADC analog macros that ushered in the era of coherent fiber-optic product solutions.

Key Responsibilities
  • You will be responsible for architecting circuit solutions and performing feasibility work to recommend the best solution to carry through implementation by weighing tradeoffs and discussing these with other members of the team.
  • You will be well-versed with the system tradeoffs and details at a sufficient proficiency of the overall problem that needs to be solved to meet the market or customer objective.
  • You will report on status updates regularly, participate in team meetings, and share experiences with the rest of the team. You will also produce clear and articulate presentations for senior management.
  • You will have close interactions with allied teams in optical design, packaging design, DSP, and system design.
What Ciena Expects of You
  • A sense of urgency and accountability – what's important to the customer is important to you; you make getting things done a priority.
  • Detail-oriented – you will deliver on objectives through meticulous, thorough, and comprehensive work.
  • Problem solver – you possess the ability to analyze and methodically solve complex technical problems using engineering principles and approaches.
  • Commitment to learning – you keep abreast of technology developments and are keen to share your knowledge with others.
Requirements
  • You must have an electrical or computer engineering, computer science, or other applicable scientific degree at the BEng/BSc, MEng/MSc, or PhD level.
  • You must have demonstrated experience as a high-speed analog circuit architect with knowledge of the capabilities of the latest and emerging BiCMOS and/or CMOS technology with a minimum of 10 years of industrial experience.
  • You must be proficient with the use of applicable design tools from Cadence, Mentor, and Synopsys for analog design (e.g., Virtuoso, Calibre, STAR-RC, MMSIM).
  • You must be a highly motivated self-starter, able to work independently, while being a great teammate.
  • You must have excellent organization, written, and oral (English) interpersonal skills.
  • You must have a history of successful analog circuit product deliveries based upon architectures that were delivered.
  • You must be able to methodically address sophisticated technical problems with solutions that balance tradeoffs across many domains to best meet customer requirements.
Assets
  • Experience with team leadership within an analog macro design group.
  • Experience formulating solutions taking into consideration business and economic factors.
  • Experience sizing risk and design effort estimates for new architectures.
  • Architect or System Design experience for complex analog macro-IP solutions using tools such as MATLAB and/or C++.
Compensation and Benefits

The annual pay range for this position is $127,700-$204,100 CAD.

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission.

In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time.

We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.