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Senior Analog Design Engineer
1 month ago
As a senior analog design engineer at Synopsys, Inc., you will be part of the PLL design team responsible for creating innovative analog and mixed-signal designs. Our team's work enables the next generation of datacenters, automobiles, and communications networks. You will work on system-level and circuit-level PLL design in the latest FINFET and gate all around CMOS technology nodes. Your designs will support high-speed Serdes designs including PCI-Express, Ethernet, CPRI, and other applications at rates up to 112Gbps, 128Gbps, 224Gbps and beyond.
Key Responsibilities:
- Design and develop analog circuits such as VCOs, charge pumps, and voltage regulators
- Develop custom circuit design in deep-submicron and FINFET CMOS technologies
- Collaborate with layout and CAD teams to ensure seamless design implementation
- Provide technical leadership and mentoring to junior designers
- Stay up-to-date with industry trends and advancements in analog and mixed-signal design
Requirements and Qualifications:
- 8+ years of experience in CMOS analog and mixed-signal circuit design with a Master's or Ph.D. degree. Candidates with a Bachelor's degree and additional experience will also be considered
- Strong knowledge of PLL loop operation and design
- Experience in design of SerDes blocks and/or PLL circuit components such as VCO's, charge-pumps, regulators, and high-speed dividers
- Proficiency in Hspice, Finesim, PrimeSim, or similar spice-type simulators
- Schematic entry skills in Synopsys Custom Designer or similar tools
- Knowledge of digital timing in PrimeTime and/or Nanotime is an asset
