Lead Digital Verification Engineer
4 weeks ago
Staff Digital Verification Engineer Position
We are seeking a skilled professional to contribute to the development of cutting-edge mixed-signal Application Specific Integrated Circuits (ASICs). This role offers the flexibility to work remotely or from our office.
As an integral part of our expanding design and verification team, you will be responsible for enhancing and sustaining our UVM test environment, generating new test scenarios, and troubleshooting mixed-signal chips through digital simulation.
Key Responsibilities:
- Conduct verification of mixed-signal ASICs within a SystemVerilog UVM framework.
- Develop test cases aligned with functional specifications and testing strategies.
- Perform RTL and potentially gate-level debugging of mixed-signal ASICs.
- Establish functional coverage and assist designers in evaluating code coverage.
- Oversee the verification process for smaller projects.
- Guide and mentor junior engineers.
Essential Qualifications:
- Bachelor's degree in Electrical, Computer, or Software Engineering.
- 8+ years of experience in design verification utilizing SystemVerilog UVM and ASIC verification methodologies.
- Proficient in functional coverage-driven verification sign-off.
- Capable of contributing to comprehensive verification plans.
Desirable Skills:
- Familiarity with Phase-Locked Loops (PLLs).
- Experience with Synopsys and/or Cadence simulation tools.
- Competence in Unix/Linux operating systems.
- Knowledge of scripting languages such as Python.
- Experience in mixed-signal design modeling and debugging.
About Renesas Electronics:
Renesas is a leading global semiconductor company committed to delivering innovative solutions across automotive, industrial, infrastructure, and IoT sectors. Our diverse product offerings include microcontrollers, system-on-chips, and analog and power products designed for various applications. Be part of our mission to shape the future of electronics and technology.
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