Senior ASIC Digital Design Engineer

6 days ago


Ottawa, Ontario, Canada Synopsys Full time
Unlock the Future of DDR PHY IP

Synopsys is at the forefront of silicon design innovation, providing the essential tools and intellectual properties to drive the semiconductor industry forward.

We're powering the next generation of design with cutting-edge technologies for chip design and software security. Our DDR PHY IP products are a cornerstone of the mixed-signal IP market, and we're the leading provider of these solutions.

The DDR PHY IP team is responsible for developing both digital and analog components that come together to create high-performance, high-bandwidth, low-latency, and low-power products.

Join Our Mission

We're seeking a Senior ASIC Digital Design Engineer to join our DDR PHY IP team and contribute to the development of our world-class DesignWare DDR PHY IP solution.

Key Responsibilities:
  • Collaborate with a global team to push the boundaries of DDR PHY IP development and solution
  • Contribute to all phases of design, from specification to productization, including customer support for SoCs
  • Develop and implement complex technical solutions using synthesizable Verilog and System Verilog design concepts
Requirements:
  • BS/MS in Electrical Engineering with at least 2 years of experience in complex technical development
  • Experience with frontend design flows, including linting, synthesis, timing investigation, and closure
  • Excellent communication skills and self-motivation
  • Understanding of DDR memory and DDRPHY architecture is a plus


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