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Lead Physical Design Engineer
3 months ago
At Cadence Design Systems, Inc., we cultivate leaders and innovators eager to influence the technological landscape.
Position: Principal Physical Design Engineer (PNR/Physical Verification/STA/EMIR)
The selected candidate will engage in a variety of complex design challenges, including low power and high-speed design. This role involves collaboration with our RTL design and Analog teams to ensure effective tapeouts, as well as participation in or leadership of next-generation PHY IP physical design, methodology, and flow development.
Main Responsibilities:
- Engage in or lead the development of advanced physical design methodologies and flows in cutting-edge technology nodes.
- Execute physical design tasks, including floor planning, power grid design, placement and routing, clock tree synthesis, timing closure, and signoff for power/signal integrity, physical verification (DRC/LVS/Antenna), and EM/IR.
Position Requirements:
- Bachelor's degree or higher in Electrical Engineering, Computer Science, or Information Technology, with over 10 years of relevant experience.
- In-depth understanding of design rules for processes at N7/N5 and below.
- Proficiency in scripting languages and their application in methodology.
- Capability to resolve physical design violations, including DRC, DFM, LVS, ANT, and ERC.
- Extensive experience in static timing analysis.
- Quick learner with strong communication and teamwork skills.
- Demonstrates care, responsibility, and persistence in work.
We are committed to impactful work. Join us in tackling challenges that others cannot.
We encourage applications from individuals with disabilities and those from equity-seeking groups. If you require accommodations during the application and interview process, please communicate your needs.