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Only 24h Left Serdes Architecture Team – Sr Manager

4 weeks ago

Mississauga, Ontario, Canada Synopsys, Inc. Full time
Senior Manager - System Architecture Team

You will be leading a system architecture team tasked with developing >=32Gbps NRZ and >=112Gbps PAM4 serial-link transceivers. We are looking for a manager with theoretical knowledge and practical experience to contribute to the team. You will work with a cross-functional design team of analog and digital designers, and hardware engineers.

The team is involved in all stages of development including:

- Architecture: definition of architecture and specifications for the transmitter and receiver

- Modelling: design and maintenance of the system level model

- Sign-off: system level simulation of the design performance across multiple protocols and channels

- Silicon: qualification and correlation of performance and algorithms in silicon

- Customers: assisting customers on system level performance and algorithmic issues

You have an MSc or PhD in Electrical or Computer Engineering.

Due to the cross-disciplinary nature of this position, key qualifications include one or more of the following:

- Modelling - experience in C/Matlab/Verilog-A/SystemVerilog modeling of circuits and systems

- Analog – solid background in high-speed analog CMOS circuit design

- Digital – experience with DSP

- Hardware – awareness of per-protocol handling of RX and TX adaptation; hands-on experience in measurement of transceiver performance

- Communications theory – equalization, coding, noise/crosstalk filtering

Beneficial Experience:

- Experience in analyzing link budgets for either NRZ and PAM4 high-speed serial links

- Familiarity with modelling of SERDES transmitters and receivers in Matlab or similar tool

- Knowledge of circuit topologies in high-speed Rx/Tx SerDes PHY

- Understanding of Tx/Rx equalization techniques

- Knowledge of CDR architectures and CDR loop dynamics

- Knowledge about common high-speed serial data protocols including PCIe5, 10G/25G/56G/112G Ethernet, JESD204C, CPRI

- Experience in lab testing of high-speed serial links

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