Ingénieur responsable planning F/H

1 week ago

Eastern Ontario, Canada Marvell Full time
About MarvellMarvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.Your Team, Your ImpactThe Optical Digital Signal Processing (ODSP) PHY SW Team works on Marvell's products used in optical communication links. These chips form the backbone of the internet, moving data within data centers, between data centers, between cities, and even continents over high bandwidth optical fibres. SW team owns all the SW components for the chips, including embedded FW, customer SDK, lab scripts, and GUI applications to interface with the chips. This team is a critical part of the product development flow from initial lab bring-up to field deployment and is the go-to group for getting things done, whether in the field or the lab.
Marvell's DSPs are used in 100G to 1.6T optical modules in every major cloud data center around the world. Even the data used for this job description has travelled through many of Marvell's DSPs to reach your computer, and our products are a key part of the biggest AI clusters that power all the latest generative AI projects. Check out our products here.
The software team is looking for a strong candidate with a positive attitude – ready to tackle any challenge. Join us and get the opportunity to make a meaningful impact on the projects we work on while gaining first-hand experience of what it is like to be part of a high-performing SW development team.What You Can ExpectThe core responsibilities for the SW team include:
  • Embedded FW that runs on our RISC-V-based multi-core MCU, which controls our proprietary DSP data path
  • C SDK provided to customers for interfacing and controlling our product
  • Python-based GUI for in-field debug, status, and control
  • Build, test, and automated regression infrastructure for the above
However, the SW team is a key enabler for bringing a product to production, and the role of a Principal Engineer in our team is to ensure the overall success of that product. For each individual, the role can be some combination of project planning and technical development. This is a highly visible position within the larger organization, you will be a key player in the bring-up and development of the product through its entire lifetime.In this position you will be:
  • The technical or project lead on a product, driving the whole SW team dedicated to that project (2-8 other developers) through the development process from collecting requirements to volume production
  • Responsible for the overall Architecture, Design, Development, and Testing of embedded C firmware for controlling our extremely complicated DSP HW
  • Taking lead on difficult to debug issues, drive to root causes with HW/Systems teams, and follow up with test/validation/customer support teams to make sure the issue is resolved
  • Working with the cross-functional team to plan SW milestones, develop in sprints, closing tickets, work with multiple test disciplines, squash all the bugs, and roll out features for the product as a whole
  • Distilling complex systems specifications from standards bodies (MSA/OIF/CMIS) or directly from the customer into easy-to-digest internal documentation, definition of requirements, and clear sequence diagrams to aid in development.
  • Traveling to offices worldwide for product development and chip bring-up (~3 weeks/yr, California, Italy, Vietnam)
Some possible tasks will be:
  • Mentoring a Jr engineer while working on a difficult HW/SW debug together
  • Developing the use cases, architecture, and system diagrams for a complicated new feature, and integrating that feature into the existing FW & Customer SDK to be as seamless as possible
  • Convert computationally heavy floating point Matlab algorithms into fixed point firmware state machines, and coming up with simple ways to compare the two to guarantee functional correctness
  • Working with leads in other teams to develop a post-silicon system test plan for a brand new product
  • Using production FW against the DV simulation environment to root cause a complicated sequencing issue only seen in the field
  • Convincing a large group of hardware designers to make changes in next generation products to improve field usability
What We're Looking For
  • Minimum Requirements:
    • BS/MS degree in CS/EE or related technical field(s)
    • 10+ years of experience in memory constrained embedded C/C++ FW development
    • SW Team Lead or Technical Lead on embedded projects; project management & release planning, architecture design & development, code reviews & testing, through to customer volume production
    • Understanding of embedded SoC, micro-controller architecture (RISC-V architecture a plus), memory-mapped hardware interfaces, GPIOs, ISRs, etc.
    • Excellent verbal and written communication skills in English, and able to collaborate in a large cross-functional organization
    • Excellent problem-solving and customer debug skills on real hardware in the lab
    • Experience with using revision control and defect tracking systems (git & Jira or similar)
  • Preferred but not required:
    • Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, and/or Optical Module SW
    • Experience with designing/developing/debugging software state machines, transitions, context saving, error handling
    • Experience with mixed-signal (analog+digital) control and monitoring, PID/feedback loop control, etc.
    • Experience with bare-metal, RTOS, device driver, Linux kernel, etc.
    • Familiarity with advanced compiler options and details (clang/gcc preferred)
    • Proficient in C and Python, with knowledge of git, Linux, makefiles, gdb, IDEs, bash, etc.
    • Familiarity with digital verification test flows, FPGA emulation, hardware languages such as Verilog
    • Familiarity with lab equipment such as oscilloscopes, supplies, PNAs, ONTs, etc.
    • Understanding of networking from the OSI model, with emphasis on the PHY up to the data link level
    • Understanding of signal processing: histograms, BER, SNR, sampling phase, Shannon limit, impulse & frequency response, FFT, etc.
Additional Compensation and Benefit ElementsWith competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #J-18808-Ljbffr

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