R&D Architect

3 weeks ago

Ottawa Ontario HB, Montréal, Canada Synopsys Full time

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world’s broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

We are looking for an R&D Architect to join a growing, dynamic and multi-cultural CAD software and methodology team.

This role will be working in multi-functional teams, capable of developing specifications for IC design productivity tools, come up with creative solutions, are reliable in following existing procedures but have a critical viewpoint and can tradeoff the optimal with the best on a daily basis.

Qualifications:

  • MSEE (or PhD) with 15+ of experience
  • Extensive knowledge of Analog & Mixed-Signal circuit design
  • Proficiency with spice simulators including HSPICE, PrimeSim/FineSim and PrimeWave
  • Programming skills in languages such as Python, Perl, TCL
  • Ability to provide automation for rapid and dynamic design needs is highly sought-after
  • Direct design experience in high speed PHY such as SERDES, DDR or HBM is a strong plus
  • Must be a team player with good written and verbal communication skills, self-motivated, thorough design styles, detail oriented, and work with multiple functional teams with good engineering practices
  • Understanding of behavioral Verilog models & experience in SystemVerilog for AMS circuits
  • Prior experience on products/test chips bring up, lab debug and simulations to silicon correlation is highly desirable
  • Candidate with Machine Learning paradigms/techniques understandings with knowledge of applying it in modeling, circuit design flow & simulations is desirable
  • Ability to setup workgroups/teams to achieve best efficiency in driving goals and activities
  • Previous managerial experience will be considered as a plus

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