ASIC Design Verification Engineer
3 weeks ago
We are seeking an ASIC Design Verification Engineer to join our client's innovative team. This role offers the opportunity to work on advanced verification methodologies and collaborate with global teams on cutting-edge semiconductor projects.
In this role, you will have the opportunity to develop and execute test plans, design UVM-based verification environments, and create constrained-random test cases to ensure ASIC functionality. Your responsibilities also include debugging simulation failures, tracking coverage metrics, and automating verification tasks for efficiency. Collaborating with designers, architects, and clients, you will lead verification activities, monitor progress, and drive successful project execution.
What We're Looking For
- Experience in ASIC verification and UVM-based methodologies.
- Proficiency in SystemVerilog, Verilog, UVM, functional coverage, and formal verification.
- Strong debugging skills and experience with PCIe, Ethernet, DDR/LPDDR, AXI, ARM subsystems, etc.
- Ability to automate verification tasks and collaborate with diverse teams.
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