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We are seeking a highly experienced Senior ASIC Design Engineer to join a high-performance hardware development team. This role involves end-to-end ASIC design, from micro-architecture definition through implementation and debug, supporting advanced high-speed communication systems. Key Responsibilities Define micro-architecture and contribute to system-level ASIC design decisions Implement and verify complex digital logic for high-performance ASICs Debug functional, timing, and integration issues across the design lifecycle Collaborate closely with architecture, verification, physical design, and system teams Support design reviews, documentation, and design sign-off activities Contribute to continuous improvement of design methodologies and tools Required Skills and Experience Bachelor’s degree in Electrical or Computer Engineering; advanced degree preferred Minimum of 10 years of hands-on ASIC design experience Strong skills in micro-architecture, RTL design, and design debugging Excellent problem-solving and analytical abilities Strong verbal and written communication skills Solid understanding of the full ASIC design flow and associated EDA tools Ability to work effectively in a collaborative, multi-disciplinary environment Preferred Qualifications / Assets Experience with MATLAB and scripting languages (e.g., Python, Perl, Tcl) Familiarity with telecom and high-speed interface protocols such as OTN, CAUI, or similar Working knowledge of DSP, FEC, and digital communication theory Design experience supporting Ethernet standards from 100G through 800G #J-18808-Ljbffr
