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Mid-Senior RTL Design Engineer — PCIe/CXL IP

2 hours ago

Vancouver, Canada AMD Full time

A leading semiconductor company is seeking a Mid-Senior Level Engineer in Vancouver, BC. The role involves the microarchitectural design and RTL implementation of PCIe and CXL technologies. Candidates should have over 8 years of design experience and familiarity with high-speed protocols. Strong analytical and problem-solving skills are essential, along with excellent communication abilities. Enjoy a collaborative work environment while contributing to cutting-edge semiconductor solutions.#J-18808-Ljbffr