Power Integrity Design Engineer
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Develop end-to-end power delivery designs for Intel platforms Build and correlate VRM-to-die power integrity models Analyze DC IR-drop, impedance, transients, and Ldi/dt Design package and PCB decoupling and stackup strategies Correlate bench measurements with simulation results Requirements:
Bachelor’s or Master’s degree in Electrical Engineering or related field Five-plus years designing low-voltage, high-current multi-phase regulators Experience with Cadence Sigrity, Ansys SIwave, SPICE, or similar tools Power delivery modeling across die, package, and PCB Oscilloscope and data acquisition experience for hardware debugging Apply power integrity, regulator design, simulation, and debugging expertise to Intel’s Toronto AI compute platforms.
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