Low Power ASIC Design Engineer at Qualcomm
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As a part of Qualcomm's Engineering Group, you will engage in developing next-generation low-power AI subsystems for various markets including mobile, automotive, and IoT. Your expertise in Verilog and ASIC hardware design will be essential for performance analysis and integration tasks. Collaborate closely with verification and implementation teams to push the envelope of audio technologies while minimizing power consumption.
Key Responsibilities: • Develop micro-architecture for digital audio and AI IP blocks • Implement and integrate modules in Verilog RTL • Analyze performance, area, and power tradeoffs • Conduct power optimization reviews and projections • Debug tests throughout the ASIC development cycle
Requirements: • Bachelor's in Science, Engineering, or related field • 0-2 years of ASIC design experience • Proficient in Verilog/VHDL RTL design • Understanding of ASIC/VLSI concepts • Ability to work legally in Canada
Make your mark in audio technology by bringing low-power designs to life at Qualcomm.
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