Electrical SerDes DSP Design Engineer at Ciena
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As a leader in technology, Ciena seeks a Principal Engineer to design electrical SerDes architectures and enhance optical IMDD systems. You will utilize deep expertise in digital signal processing and control theory, collaborating with cross-functional teams to optimize performance and develop impactful algorithms for data communication. This position is perfect for those with a Ph.D. and over 8 years of industry experience.
Key Responsibilities: • Lead SerDes DSP architecture design for communication systems • Evaluate and model system performance and constraints • Develop algorithms for timing recovery and adaptive equalization • Collaborate with teams to ensure optimal system integration • Document specifications and performance metrics for innovation roadmaps
Requirements: • Ph.D. in Electrical Engineering with 8+ years of experience • Advanced skills in SerDes design and DSP implementation • Proficient in FEC performance modeling • Experience with MATLAB, Python, or C/C++ • Strong understanding of optical communication standards
Take your expertise in high-speed communications to the next level at Ciena.
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