Design Verification Intern

2 weeks ago

Ottawa, Ontario, Canada MSCI Full time

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

At Marvell's ASIC business unit (ASIC BU), and more specifically the cryptographic IP team, we develop and design leading edge cryptographic IP. We are looking to add talented people to our design, verification and physical design teams - working on all facets of designs for our leading 5nm SOC's targeting data center and borderless enterprise. As a member of a dynamic verification teams, you will be responsible for learning state of the art ASIC verification methodology UVM, architecture of the blocks that do packet processing, design test benches and test plans. Perform verification of such blocks to meet all milestones and quality metrics.

What You Can Expect

  • Work with Marvell verification engineers to find RTL design bugs by helping to write design verification test bench components and/or tests and help debug simulation failures.
  • Help write scripts to support design verification tasks.
  • As an intern at Marvell, you will be working directly with a senior mentor engineer on a real block in one of our designs. This is a great opportunity to gain real world experience

What We're Looking For

Minimum Requirements
  • Candidate MUST be currently pursuing a BS/MS (preferred) degree in EE/CE or related technical field(s)
  • 0-1 years of previous experience
Preferred Requirements
  • Strong programming skills including object-oriented programming
  • Knowledge of Verilog/System Verilog
  • Some exposure to digital logic and computer architecture
  • Knowledge of semiconductor design verification techniques is desirable
  • Must be currently enrolled in a university program working towards a BS/MS degree in Computer or Electrical Engineering

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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