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Sr. Principal Analog IC Designer

2 weeks ago

Montréal, Canada Cadence Design Systems, Inc. Full time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Senior Principal Design EngineerThe Sr Principal Analog IC Designer is responsible for design and developing analog/mixed-signal IC circuit blocks, the architecture and initial concept/specification through final verification of conformance to customer specifications. The Sr Principal Analog IC Designer contributes to the design of long-reach SerDes.The Sr Principal Analog IC Designer’s responsibilities include but not limited to:· Implement and simulate SerDes, AFE, and IO circuits· Document the circuit implementation and simulation results· Present circuit performances in internal design review meetings· Characterize circuit performance and post-process lab dataThe Sr Principal Analog IC Designer may also conduct feasibility and architect major SERDES subsystems and provide technical leadership to junior designers.Position Requirements:· Canadian Citizen or permanent resident· Masters or PhD degree in electrical engineering with specialization in analog microelectronics· Minimum 8 years of experience in CMOS SerDes or high-speed I/O IC design and development (≥16Gb/s) and in technologies ≤16nm· Excellent problem-solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment· Must have a thorough understanding of jitter and signal equalization techniques· Proficient design experience in some of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High-Speed Clock Distribution; ADCs and DACs; Bias and Bandgap; and Voltage Regulators· Expertise in low-jitter PLL design is a strong asset· Proficiency in using CAD tools for circuit simulation, layout, and post-layout verification· Other non-requirements that would be assets for candidates:o Familiarity with custom IC layouto Familiarity with Cadence design and simulation toolso Lab test experienceo Familiarity with scripting languages (python, skill, etc)o Working knowledge of a set of common SerDes standards (PCIe, Ethernet, etc) and their electrical requirementsCadence is an equal opportunity employer committed to hiring a diverse workforce.Concepteur Senior Principal de Circuits Intégrés AnalogiquesLe Concepteur Senior Principal de Circuits Intégrés Analogiques est responsable de la conception et du développement de circuits analogiques et mixtes, de l'architecture et de la spécification initiale jusqu'à la vérification finale de la conformité aux spécifications établies. Le Concepteur Senior Principal contribue à la conception de SERDES de longue portée.Les responsabilités du Concepteur Senior Principal de Circuits Intégrés Analogiques comprennent, sans s'y limiter :· L’implantation et simulation des circuits SerDes, AFE et I/O· La documentation de la mise en œuvre du circuit et les résultats de simulation· La présentation des performances des circuits lors des réunions internes· La caractérisation des performances des circuits ainsi que le traitement et l’analyse des données de laboratoireLe Concepteur Senior Principal de Circuits Intégrés Analogiques peut également réaliser des études de faisabilité et concevoir des sous-systèmes SERDES majeurs ainsi que fournir un soutient technique auprès des concepteurs juniors.Exigences du Poste· Être citoyen canadien ou résident permanent· Détenir une maitrise ou un doctorat en génie électrique avec spécialisation en microélectronique analogique· Avoir un minimum de 8 ans d'expérience dans la conception et le développement de SERDES CMOS ou de circuits intégrés I/O à haute-vitesse (≥16 Gbps) dans des technologies ≤16nm· Avoir d’excellentes compétences en résolution de problèmes, de bonnes capacités de communication et une aptitude à travailler en équipe· Doit avoir une compréhension détaillée du concept de jigue et des techniques d'égalisation du signal· Avoir de l’expérience dans la conception de la plupart des blocs de circuits SERDES: TX, RX, sérialiseur, désérialiseur, interpolateur de phase, PLL, distribution d’horloge à haute vitesse, ADC et DAC, circuits de polarisation et de référence de tension (Bandgap), et régulateurs de tension.· Une expertise en conception de PLL est un atout majeur· Maîtrise des outils CAD pour la simulation de circuits et la vérification post-layout· Autres qualifications facultatives recherchées :o Familiarité avec le dessin de masqueso Expérience avec les outils de Cadenceo Familiarité avec les tests de laboratoireo Familiarité avec les langages de script (python, SKILL, etc)o Connaissance pratique d’un ensemble de normes SerDes courantes (PCIe, Ethernet, etc) et de leurs exigences sur le plan électrique.Cadence est un employeur qui souscrit à l’égalité des chances et qui s’engage à embaucher une main-d’oeuvre diversifiée.We’re doing work that matters. Help us solve what others can’t.We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.