Senior Digital IP Engineer for Advanced Designs
7 days ago
About the Company
Synopsys, Inc. is a world leader in electronic design automation (EDA) software that accelerates innovation in the global electronics industry. Our Silicon IP business is focused on integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors.
Your Responsibilities
- You will work on various advanced SERDES developments, including the latest 56/112/224G standards.
- You will be responsible for the Physical Implementation of high-speed interface IPs and test-chips, driving all aspects from RTL to GDS, including timing and physical sign-off.
- You will work in close interaction and collaborative teamwork with multiple functional groups (front-end digital, analog design and layout, CAD) and the product team.
Requirements
- You should have 10+ years of digital or physical design experience with recent contributions to project tape-outs, as a technical driver and/or project head.
- You must have an intimate understanding of the full design cycle from RTL to GDSII, including chip-level.
- Experience with advanced FinFET nodes, TSMC 16 nanometer or below, including low-power design techniques is necessary.
- A solid engineering understanding of the underlying concepts of digital design and architecture, implementation flows, and physical and timing sign-off is required.
- You should develop timing constraints and design architectures to ensure on-time delivery, meeting or exceeding power and area targets.
- Excellent communication skills, ability to think and communicate at different levels of abstraction, with peer groups as well as customers are essential.
- Methodology-guided with excellent software and scripting skills (Perl, Tcl, Python), understanding of CAD automation methods are also required.
- A solid understanding of the challenges inherent in analog/digital interfaces is necessary.
- You must be autonomous and able to cope with interrupts.
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