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Digital ASIC Design Engineer
3 weeks ago
We are seeking an experienced ASIC Digital Design Engineer to join our team at Synopsys, Inc. As a key member of our global engineering team, you will be responsible for designing and verifying cutting-edge ASIC solutions.
Key Responsibilities:
- Develop comprehensive test benches for IP subsystems.
- Verify integrated IP subsystems to ensure they meet customer specifications.
- Collaborate with global engineering teams to drive project success.
- Utilize UVM verification environments to optimize verification processes.
- Debug and resolve complex issues within IP subsystems.
- Document verification plans and results to maintain project transparency.
Requirements:
- BSEE in Electrical Engineering with 7+ years of industry experience or MSEE with 5+ years.
- Proficiency in Verilog, System Verilog, and Perl/Python scripting.
- Strong experience with UVM verification environments.
- Excellent debugging skills and ability to root cause issues.
- Experience with DFI, DDR PHY, or Memory subsystems.
The ideal candidate will have a strong background in developing test benches and verifying integrated IP subsystems, with a proven track record in UVM verification environments. They should also have excellent communication and problem-solving skills, as well as the ability to work effectively in a collaborative environment.