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High Performance FPGA Design Engineer

2 months ago


Montreal, Quebec, Canada DRW Full time

About DRW

DRW is a diversified trading firm with over three decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot to capture opportunities, so we operate using our own capital and trade at our own risk.

We operate with respect, curiosity, and open minds. The people who thrive here share our belief that it's not just what we do that matters – it's how we do it. DRW is a place of high expectations, integrity, innovation, and a willingness to challenge consensus.

We are currently seeking a highly skilled FPGA design engineer to join one of our trading teams. This person will participate in the full development lifecycle, including system and block level testing, of low latency high throughput FPGA designs.

Key Responsibilities:

  • Architect and implement new FPGA applications from scratch, including synthesis, place & route, static timing analysis, and documentation.
  • Facilitate software integration efforts by developing new APIs and optimizing low-level code.
  • Propose creative solutions to overcome FPGA/hardware limitations.
  • Collaborate directly with software/strategy team and other design teams.
  • Conduct lab debugging and support deployed solutions.

Requirements:

  • Bachelor's degree or higher in Computer/Electrical Engineering, with 4+ years of experience in the field.
  • Solid hardware engineering experience, especially with FPGA.
  • Strong skills in RTL logic design (Verilog) and verification, with 2+ years of experience writing Verilog.
  • Experience in FPGA design flow, including synthesis, place & route, and static timing analysis.
  • Experience with the design of system-on-chip (SOC) architectures, memory & processor subsystems, networking, and peripheral interconnect.
  • Knowledge of the TCP/IP stack and on-chip networking applications.
  • Strong working knowledge of either XILINX or ALTERA FPGA design flow.
  • Experience with functional verification utilizing high-level methodologies (e.g., System Verilog) is a plus.
  • Strong system level debugging and data analysis skills.

Compensation Package:

The estimated salary for this position is $120,000-$180,000 per year, depending on qualifications and experience. Additionally, DRW offers a comprehensive benefits package, including medical, dental, and vision insurance, as well as a generous 401(k) matching program.