Digital Verification Specialist
1 month ago
Contribute to the development of verification infrastructure and protocols.
Develop System Verilog/UVM-based protocol/traffic generators/checkers and create test plans based on functional requirements and standards.
Requirements- Masters degree preferred, Bachelor's degree in CS/EE required.
- 8+ years of experience in ASIC verification.
- Developed/implementing test plans at block or sub-chip levels for complex ASICs.
- Fluent in System Verilog and scripting languages like Python.
- Intimate knowledge of UVM methodology.
- Assertions and functional coverage expertise.
- Experience with code coverage and formal verification tools.
- Good communication skills and ability to work in a geographically diverse team.
- Responsible for defining, developing, and executing self-checking tests for complex digital ASICs.
- DSP and/or FEC knowledge desirable.
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