Multimedia ASIC Design Staff Engineer

2 weeks ago

Vancouver, British Columbia, Canada Qualcomm Full time
Job Title: Multimedia ASIC Design Staff Engineer

Qualcomm Canada ULC is seeking a highly skilled Multimedia ASIC Design Staff Engineer to join our Engineering Group, ASICS Engineering team.

Job Summary:

We are looking for a strong ASIC design engineer to be involved in the design of world-class image and video processing blocks. As a member of our team, you will be responsible for collaborating with hardware/system architects to micro-architect/design HW specific to Multimedia and Camera Image, Signal Processing algorithms, and owning and delivering core-level IP.

Key Responsibilities:
  • Collaborate with hardware/system architects to design HW specific to Multimedia and Camera Image
  • Design and implement Signal Processing algorithms
  • Own and deliver core-level IP
  • Run synthesis, review results to ensure desired QoR is met
  • Perform design rule checks, low power checks, cross-clock-domain (CDC) checks
  • Evaluate performance, area, power, and system cost tradeoffs
  • Work closely with design verification engineers to develop test plans and reference bus-functional models
  • Implement and debug tests at both the module and core level throughout the development cycle
  • Create and maintain design documents
Requirements:

We are looking for a candidate with a Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Alternatively, a Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience, or a PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Ideal candidates will have 5+ years of industry experience in Verilog or VHDL RTL design, Design Verification, Bus protocols like AHB, AXI, Image, Video, Graphics, Multimedia Processing, or DSP, and experience with RTL sanity tools specific to Design Rule Checking, Clock Domain Crossing checks, Synthesis, Timing analysis, Low power checks.

Preferred qualifications include experience with System Verilog or System C, ASIC implementation of Image Processing Camera IP, experience working with synthesis and physical design teams, and TCL/Perl/Python/shell-scripting skills.

Qualifications:

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, please contact us.

Qualcomm is committed to providing an accessible process and making our workplace accessible for individuals with disabilities.

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