ASIC Digital Design Manager

4 weeks ago


Nepean, Canada Synopsys Full time
Unlock Innovation in DDR PHY IP Development

Synopsys is a leader in advanced silicon design, providing essential tools and intellectual properties to drive semiconductor innovation. We're seeking a talented ASIC Digital Design Manager to join our DDR PHY IP team and lead the development of our world-class DesignWare DDR PHY IP solution.

Key Responsibilities:
  • Contribute to the design specification and productization of DDR PHY IP, including customer support for SoC integration
  • Manage a team of design engineers and collaborate with cross-functional teams to deliver high-performance, low-latency, and low-power designs
  • Develop and implement design flows, including linting, synthesis, STA, cross-domain clocking, DFT, and power optimization techniques
  • Drive innovation and excellence in DDR PHY IP development, shaping the next generation of product innovation and performance
Requirements:
  • BS/MS in Electrical Engineering with at least 6 years of experience in complex technical development
  • 2 years of experience in people management and employee development
  • Expertise in synthesizable Verilog and System Verilog design concepts and implementation
  • Strong communication skills and self-motivation
  • Understanding of DDR memory and DDRPHY architecture is a plus


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