Memory Wrapper Validation

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE:

Our team is responsible for creating and supporting memory wrappers for 3rd-party ECC/compiled memories, in addition to inhouse latch/flop arrays. All IPs need to meet AMD’s functionality, performance, and technology requirements while integrating seamlessly within the AMD design ecosystem. We are exposed to bleeding edge technologies and play a major role in shaping AMD’s roadmap and future products.

The focus of this role is to execute the verification of new and existing features for AMD’s memory wrappers/RTL, resulting in no bugs in the final design. Additionally, creating a system for integration of AI to enhance memory selection, feature development, testing, and compiled memory analysis will be a possibility.

THE PERSON:

You have a passion for modern, complex processor architecture, digital and memory design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

- Collaborate with engineers to understand new/old features to be verified
- Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
- Build the directed and random verification tests
- Debug test failures to determine the root cause; work with RTL and memory engineers to resolve design defects and correct any test issues
- Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements

PREFERRED EXPERIENCE:

- Proficient understanding of SRAM/ROM/ECC architecture, operation, and requirements
- Debugging RTL and creating/modifying testbenches
- Comfortable with scripting/programming languages, such as C-shell, Makefile, Perl, Python, and TCL in a UNIX environment
- Working knowledge of Verilog/RTL, liberty files, spice simulation, and ASIC design flows
- Working knowledge of AI integration into various scripts/flows

ACADEMIC CREDENTIALS:

- Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION:

Markham, ON

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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