Digital ASIC/FPGA Designer

3 weeks ago

North Census Division SK, Canada Infotree Global Solutions Full time

Description :
Hybrid Role in Ottawa, Canada

Digital ASIC/FPGA Designer with at least 15 years of experience and a bachelor’s degree in engineering or computer science

Top must have skills:
* ASIC RTL Design
* Verilog / SystemVerilog
* Clock Domain Crossing (CDC) Analysis
* Functional simulation debug
* RTL Synthesis


* Experience in front-end ASIC design EDA flows including: Synopsys Design/Fusion Compiler, Synopsys VCS simulation; MBIST, DFT; CDC Lint tools
* Excellent RTL ASIC/FPGA design skills in Verilog and System Verilog
* Knowledge of networking standards and wired communications protocols (such as Ethernet)
* Experience with scripting languages such as Python, Perl and TCL.
* Experience with CLIENT Vivado Design Suite

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