Senior Physical Design Engineer at Synopsys
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At Synopsys, we’re in search of a skilled ASIC Physical Design Engineer with significant experience in SoC implementations and a strong design methodology background. This senior role emphasizes your capability to lead projects, optimize design processes, and enhance chip performance through rigorous analysis and verification.
Key Responsibilities: • Implement physical design for advanced test chips • Develop strategic floorplans and power architecture • Own RTL-to-GDSII flow for timing and performance • Execute thorough static timing and physical verifications • Manage updates and quality assurance for hard-macros
Requirements: • Experience of 9+ years in ASIC design • In-depth knowledge of physical design workflows • Familiarity with test chip methodologies and CAD tools • Proven project coordination skills • Authorized to work in the USA
Bring your technical expertise and passion for innovation to enhance Synopsys's world-class IP solutions.
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