Senior Analog and Mixed-Signal Design Engineer
5 days ago
Full time
7 days ago, from Marvell Technology Group
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Central Engineering - Optical PHY team is responsible for delivery and deployment of world-class IPs built for optical data center connectivity products.
What You Can Expect
Seeking a Senior Principal designer of Analog IC to be part of Marvell's central engineering team designing highly sophisticated CMOS transceiver IPs and other critical IPs. Responsibilities would span working with the team on architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs, etc., to meet key performance targets and performing design verification using industry-standard tools such as SPICE, Spectre, MATLAB, etc.
In this role, the successful candidate will be part of a team of analog design engineers, interface with layout, verification, and application teams, and manage the delivery of analog IP to successfully bring designs from concept to production.
What We're Looking For
Master’s degree and/or PhD preferred in Electrical Engineering or related fields with 15+ years of experience. A successful candidate should have experience in some of the following designs:
- PLL, Data Converters, Oscillators, and high-speed SerDes design including Receiver and Transmitter design.
- Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post-layout extraction tools) is a must.
- Knowledge of the fundamentals on signal integrity improvement, noise reduction, and Multi-GHz low-jitter clock generation & distribution.
- Good understanding of analog layouts in FinFet and its effect on high-speed designs.
- Experienced in system-level pre-tape out analog validation.
- Experienced in lab chip bring-up and debugging efforts.
- Strong leader and communicator.
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability, or protected veteran status.
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