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System Architecture Team, Sr. Staff Engineer

2 months ago

Mississauga, Canada Synopsys, Inc. Full time

System Architecture Team, Sr. Staff Engineer

You will be part of an R&D team developing 32Gbps NRZ and 112Gbps PAM4 serial-link transceivers. Specifically, you will be responsible for modelling, design, analysis, and algorithms for the transmitter and receiver mixed signal (analog and digital) front-end. We are looking for an engineer with theoretical knowledge and practical experience to contribute to the team. You will work with a cross-functional design team of analog and digital designers, and hardware engineers.

You will be involved in all stages of development including:

  • Architecture: definition of architecture and specifications for the transmitter and receiver
  • Modelling: design and maintenance of the system level model
  • Sign-off: system level simulation of the design performance across multiple protocols and channels
  • Silicon: qualification and correlation of performance and algorithms in silicon
  • Customers: assisting customers on system level performance and algorithmic issues

Required: You have an MSc or PhD in Electrical or Computer Engineering.

Key qualifications include one or more of the following:

  • Modelling - experience in Matlab/C/systemVerilog modeling of circuits and systems
  • Analog – background in high-speed analog CMOS circuit design
  • Digital – experience with DSP
  • Hardware – awareness on per-protocol handling of RX and TX adaptation; hands-on experience in measurement of transceiver performance
  • Communications theory – equalization, coding, noise/crosstalk filtering

Beneficial Experience:

  • Experience in analyzing link budgets for either NRZ and PAM4 high-speed serial links
  • Familiarity with modelling of SERDES transmitters and receivers in Matlab or similar tool
  • Knowledge of circuit topologies in high-speed Rx/Tx SerDes PHY
  • Understanding of Tx/Rx equalization techniques
  • Knowledge of CDR architectures and CDR loop dynamics
  • Knowledge about common high-speed serial data protocols including PCIe, Ethernet, JESD, and CPRI
  • Experience in lab testing of high-speed serial links
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