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Silicon Design Engineer
2 months ago
At AMD, we push the limits of innovation to solve the world's most important challenges. Our mission is to build great products that accelerate next-generation computing experiences. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
The Graphics Technologies and Engineering (G&E) Methodology and Technology team is responsible for developing and improving design flows for cutting-edge graphics technologies. As a member of this team, you will work closely with Block level Physical Design, Full Chip Floorplan / Netlist, Full Chip Static Timing Analysis, CAD, Methodology and Technology Teams to achieve first-pass silicon success.
**Key Responsibilities:**
- Develop and improve physical design and timing methodologies for specific nodes and SOCs.
- Automate design PPA (Power, Performance, Area) improvement and ensure high-quality design environment for SOCs.
- Perform full-chip/sub-system/tile-level timing analysis using bleeding-edge STA methodologies.
- Develop and integrate ML and LLM applications for physical design and analysis flows.
- Perform data analysis and identify design trends.
- Customize and implement solutions for new challenges.
- Collaborate with multi-site engineering teams to reach project goals.
- Develop and maintain technology collaterals.
**Preferred Experience:**
- Experience in ASIC Physical Design and/or CAD development.
- Hands-on experience with Place and Route, Timing Analysis, and Physical Verification tools from Synopsys, Cadence, etc.
- Experience in 5nm and below technologies.
- Experience with Python and Perl.
- Knowledge and experience in ML and LLM.
- Experience with data analytics applications and database management.
**Academic Credentials:**
- Bachelor's or Master's degree in Computer Engineering/Electrical Engineering.