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SOC DFT Engineer

3 months ago

Canada, CA Advanced Micro Devices Full time

THE ROLE:

As part of SoC (System-On-Chip) DFX team, the SoC DFT (Design-For-Test) Engineer will be involved in design, integration, verification & timing analysis for state-of-the-art design-for-test and design-for-debug features in complex AMD products.

KEY RESPONSIBILITIES:

  • Develop RTL and integrate internal/external RTL logic into SoC (System-On-Chip)
  • Write and review verification test-plans
  • Develop verification infrastructure, test-bench components and test-cases
  • Drive performance verification on all DFT structures
  • Generate and verify DFT structural patterns and functional patterns
  • Participate in ATE bring-up and debug the DFT patterns on ATE and platform

PREFERRED EXPERIENCE:

  • Scan and ATPG, on-chip test pattern compression and at-speed testing using PLL, memory BIST and repair, logic BIST, power-gating, on-chip debug logic is a plus
  • Knowledge of Verilog, C/C++ and scripting languages; experience with Perl and TCL is a plus
  • Familiar with entire ASIC design flow, hands-on working experience on ASIC DFT design and verification is an advantage
  • Knowledge of UVM and OVM verification methodologies is an advantage
  • Strong analytical/problem-solving skills and pronounced attention to details
  • Experience in complex ASIC design (multi-million gates) and in DFT/DFD techniques such as JTAG/IEEE standards
  • Experience in verification of multiple PHY protocols such as PCIE, XGMI, WAFL, GDDR6, USB2/3.1 and Display port is a plus

ACADEMIC CREDENTIALS:

  • Bachelors of Science or higher in Electrical Engineering or Computer Science preferred

LOCATION:

  • Canada - Markham or Vancouver
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