Design Verification Engineer

Based in Vancouver, Canada, this is an opportunity for an experienced Verification Engineer to join one of the world’s leading RISC-V companies. The Verification Engineer will become part of a worldwide CPU team developing next-generation RISC-V products for applications including 5G, AI and machine learning. The Verification Engineer will study CPU...

Hybrid model but onsite requirement is needed weekly. Senior Engineer or Junior Manager - experience with team leading required. This is an exciting opportunity for a Design Vrifiction Manager to join part of the VLSI team, which is part of my client’s worldwide CPU development team. You will join a rapidly growing organisation, and you will get the...

Job Title: Lead Design Verification Engineer (4 openings)Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only)Experience: 8 to 15 yearsJob Description:Experience in SOC level verification.Experience in PCie or Nvme.Experience with SV-UVM methodology.Experience on developing testbench and all TB components.Experience on high-speed...

The Verification Engineer will become part of a worldwide CPU team developing next-generation RISC-V products for applications including 5G, AI and machine learning. The Verification Engineer will study CPU architecture and microarchitecture implementations and determine the best methods to verify them. This is a senior role in which the Verification...

Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15 years Job Description: Experience in SOC level verification. Experience in PCie or Nvme. Experience with SV-UVM methodology. Experience on developing testbench and all TB components. Experience on...

Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15 years Job Description: Experience in SOC level verification. Experience in PCie or Nvme. Experience with SV-UVM methodology. Experience on developing testbench and all TB components. Experience on...

Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15 yearsJob Description: Experience in SOC level verification. Experience in PCie or Nvme. Experience with SV-UVM methodology. Experience on developing testbench and all TB components. Experience on...

Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15 years Job Description: Experience in SOC level verification. Experience in PCie or Nvme. Experience with SV-UVM methodology. Experience on developing testbench and all TB components. Experience on...

Job Title: Lead Design Verification Engineer (4 openings)Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only)Experience: 8 to 15 yearsJob Description:Experience in SOC level verification.Experience in PCie or Nvme.Experience with SV-UVM methodology.Experience on developing testbench and all TB components.Experience on high-speed...

Job Title: Lead Design Verification Engineer (4 openings)Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only)Experience: 8 to 15 yearsJob Description:Experience in SOC level verification.Experience in PCie or Nvme.Experience with SV-UVM methodology.Experience on developing testbench and all TB components.Experience on high-speed...

Job Title: Lead Design Verification Engineer (4 openings)Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only)Experience: 8 to 15 yearsJob Description:Experience in SOC level verification.Experience in PCie or Nvme.Experience with SV-UVM methodology.Experience on developing testbench and all TB components.Experience on high-speed...

Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15 years Job Description: Experience in SOC level verification. Experience in PCie or Nvme. Experience with SV-UVM methodology. Experience on developing testbench and all TB components. Experience on...

Job Title: Lead Design Verification Engineer (4 openings)Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only)Experience: 8 to 15 yearsJob Description:Experience in SOC level verification.Experience in PCie or Nvme.Experience with SV-UVM methodology.Experience on developing testbench and all TB components.Experience on high-speed...

Based in Vancouver, Canada, this is an opportunity for an experienced Verification Engineer to join one of the world’s leading RISC-V companies.The Verification Engineer will become part of a worldwide CPU team developing next-generation RISC-V products for applications including 5G, AI and machine learning. The Verification Engineer will study CPU...

Based in Vancouver, Canada, this is an opportunity for an experienced Verification Engineer to join one of the world’s leading RISC-V companies. The Verification Engineer will become part of a worldwide CPU team developing next-generation RISC-V products for applications including 5G, AI and machine learning. The Verification Engineer will study CPU...

Based in Vancouver, Canada, this is an opportunity for an experienced Verification Engineer to join one of the world's leading RISC-V companies. The Verification Engineer will become part of a worldwide CPU team developing next-generation RISC-V products for applications including 5G, AI and machine learning. The Verification Engineer will study CPU...

Based in Vancouver, Canada, this is an opportunity for an experienced Verification Engineer to join one of the world’s leading RISC-V companies. The Verification Engineer will become part of a worldwide CPU team developing next-generation RISC-V products for applications including 5G, AI and machine learning. The Verification Engineer will study CPU...

Hybrid model but onsite requirement is needed weekly.Senior Engineer or Junior Manager - experience with team leading required.This is an exciting opportunity for a Design Vrifiction Manager to join part of the VLSI team, which is part of my client’s worldwide CPU development team. You will join a rapidly growing organisation, and you will get the...

Hybrid model but onsite requirement is needed weekly.Senior Engineer or Junior Manager - experience with team leading required.This is an exciting opportunity for a Design Vrifiction Manager to join part of the VLSI team, which is part of my client's worldwide CPU development team. You will join a rapidly growing organisation, and you will get the...

Role : FPGA Design & Verification Engineer Location : Vancouver, BC Job Description : Partitioning to fit in multiple FPGAsBuild including RTL to Bit-file generation and adding Debug hooks within FPGA such as SignaltapBit-file and Running Software on the FPGATCL scripting skills; Debugging issues on the FPGAemulation and FPGA models and solutions from RTL...