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ASIC ML Design Engineer
4 months ago
Company:
Job Area:
Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:
QUALCOMM is the world's leading developer of next-generation wireless and multimedia technology.Qualcomm enables a world where everyone and everything can be intelligently connected. As the world's leading wireless tech innovator, we push the boundaries of what's possible to enable next-gen experiences and drive digital transformation to help create a smarter, connected future for all. Our roadmap of breakthrough technologies expands our mobile innovations and solutions to support virtually every connected device. With our leadership in wireless connectivity, high-performance, low-power computing, and on-device AI, we’re powering the connected intelligent edge.
We are searching for an ASIC design engineer interested in developing world-class solutions for the next generation of AI/ML IP.
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field.
Principal Duties:
Develop of Micro-Architecture and specification based on high level design requirements Evaluate the architecture options and trade off for area, performance, power Develop RTL design that meets required performance and is optimized for Area and Power Flow bring up and report analysis for Linting, RTL Synthesis, CLP, CDC Work closely with verification team to define testplan, debug regression, analyze coverage reports Develop SVA assertions for white box verification for formal verification Effective communication across teams, multitasking and well-planned execution of the tasks.Preferred Qualifications:
Proven experience delivering Verilog and System Verilog RTL Detail oriented with strong analytical and debugging skills Strong communication (written and verbal), collaboration, and specification skills Practiced design knowledge working with some of the following concepts:Clock domain crossing and reset architectureMachine Learning HW developmentFIFOs implementationBus implementation/verification techniquesMemory selection and controlHigh speed and low power design optimizationBus interface protocols (AHB, AXI) Experience with some of the followingSimulation and code coverage tools (VCS, Verdi, Modeltech/Questa, or Xcelium)Model development (C, SystemC, or C++)Design rule and CDC checking (SVA assertions, Spyglass, 0-in, etc.)Scripting languages (PERL, Python, TCL, C, etc.)Applicants : If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to
Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm’s toll-free number found for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.
Qualcomm is an equal opportunity employer and supports workforce diversity.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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