Memory Sub-System Validation Engineer – HBM/DDR for GPU/CPU

Memory Sub-System Validation Engineer – HBM/DDR for GPU/CPU Base pay range: $116,000.00/yr - $174,000.00/yr At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. The Role The Datacenter Graphics and Accelerated Computing Validation Team is looking for a dynamic and energetic person to join our growing post-silicon validation team. The High-Bandwidth Memory (HBM) sub-system is a niche technology, that delivers industry leading Datacenter solutions for Machine Learning (ML), and High-Performance Computing (HPC). Memory Validation engineer is responsible to drive and deliver pre- and post-silicon validation and characterization of on-die HBM or off-die DDR Memory on AMD’s Datacenter GPU (Machine Instinct product). In this wide-ranging role, validation engineer is the critical interface between various teams; DRAM architecture & product engineering, Memory Controller Design and Software, DDR PHY, to ensure that advanced memory technologies are delivered from architecture to mass production to AMD’s quality and industry standards. The validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. The Person An experienced self-starter with the ability to execute complex test plans independently and collaborate with cross-function teams to debug and resolve issues. As a valued team member, you are expected to lead by example, and mentor junior engineers. You should be hands‑on with lab tools and comfortable working in a lab environment. Key Responsibilities All aspects of pre- and post-silicon validation from planning, execution and debug. Develop and execute test plans for HBM Functional and Electrical Validation (PVT Shmoo Characterization). Apply extensive knowledge of high bandwidth memory subsystem, including SoC memory architecture, Unified Memory controller, PHY design, high speed IO interface, DRAM device, and associated calibration/training mechanisms. Key Qualifications Ability to apply knowledge of other high-speed, high-performance memory technologies. Experience working with major DRAM memory vendors and validation of DRAM device is a plus. Debug skills to root cause post-production issues and customer returns. Proven ability to drive resolution of critical problems and ability to comfortably work in lab environment. Preferred Experience Develop functional, electrical validation plans for memory features, align cross-functional teams on the support and validation plans. Drive debug in post silicon, root-cause problems and steer the team to the best corrective action to move forward. Collaborate and drive memory related silicon issues across multi-functional teams: Design, Verification, Silicon Validation, Productization, System Hardware and Software. Hands‑on experience in using industry standard JTAG, I2C, Tester and Lab tools. Strong programming skills (C/C++, Python) and comfortable working on Linux or Windows platforms. Experience in developing test cases for Machine Learning, High Performance Computing. Ability to work as a team, work efficiently in a dynamic environment and on multiple projects. Academic Credentials Bachelor’s or Master’s in Electrical or Computer Engineering + minimum 5-7 years experience. Location Markham, ON Benefits AMD benefits at a glance. Equal Opportunity Statement AMD is an equal opportunity, inclusive employer and will consider all applicants without regard to protected characteristics. We encourage applications from all qualified candidates and will accommodate applicants’ needs under applicable laws throughout all stages of the recruitment and selection process. #J-18808-Ljbffr