Verification Engineering Lead
2 days ago
Synopsys is a global leader in electronic design automation (EDA) and semiconductor IP, driving innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
Job DescriptionWe are seeking an experienced SOC Verification Engineer with a passion for innovation and problem-solving to join our team as a Verification Engineering Lead. In this role, you will be responsible for leading the development and execution of verification plans, tests, and infrastructure for complex SOC designs. You will work closely with cross-functional teams to ensure high-quality and performance-driven verification solutions.
The ideal candidate will have a strong background in processor-based SOC level verification, including experience with UVM, System Verilog, and C/C++. They will possess hands-on experience with verification tools such as VCS and waveform analyzers, and be proficient in scripting languages like Shell, Makefile, and Perl. A good understanding of AXI-AMBA protocol variants and prior work on ARM core-based subsystem verification are highly desirable.
Key Responsibilities:- Develop and execute verification plans, tests, and infrastructure for complex SOC designs.
- Lead and mentor junior engineers in debugging complex problems and developing innovative solutions.
- Collaborate with architects, designers, and pre and post-silicon verification teams to accomplish tasks.
- Work closely with cross-functional teams to ensure high-quality and performance-driven verification solutions.
- Implement and analyze System Verilog assertions and coverage (code, toggle, functional).
- Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering or equivalent.
- Minimum of 8+ years' experience in SoC/IP/Subsystems verification domain.
- Strong understanding of processor-based SOC level verification, including native, Verilog, System Verilog, and UVM mix environment.
- Hands-on experience with verification tools such as VCS, waveform analyzer, and third-party VIP integration (such as Synopsys VIPs).
- Proficiency in UVM, C/C++, and System Verilog verification language.
- Experience with scripting languages (Shell, Makefile, Perl).
- Strong understanding of AXI-AMBA protocol variants.
$140,000 - $160,000 per year.
Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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