Mixed Signal Design Engineer

This is a primary processing purpose.This is a secondary processing purpose.They gather information about your interactions on the site, such as which pages you visit frequently, how long you stay, and the links or buttons you click. They help us record any difficulties you have with the website and help us to evaluate the effectiveness of our advertising. By analyzing this data, we can understand what aspects of our site are effective and identify areas for improvement.This is a secondary processing purpose.This is a secondary processing purpose.Mixed Signal Design Engineer page is loadedMixed Signal Design EngineerPostuler locations Ottawa time type Full time posted on Publié hier job requisition id R027957Ciena is committed to our people-first philosophy. Our teams enjoy a culture focused on prioritizing a personalized and flexible work environment that empowers an individual’s passions, growth, wellbeing and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.How You Will Contribute:The Wavelogic family of products is widely used in Ciena's optical fiber transmission solutions and is one of the main contributors to Ciena's success in the telecommunications industry. Successful candidates will be joining a vibrant team with a proven track record of success over 30 years of evolution and revolution in the advancement of high-speed circuits used in broadband fiber-optic modems. This team pioneered the introduction of the world’s first high-speed DAC and ADC analog macros that ushered in the era of coherent fiber-optic product solutions. Reporting to the Senior Manager of Analog Engineering, your role will be:Designing the high precision Sigma-Delta DAC and ADC for control and monitoringDesigning the SystemVerilog models for various analog macrosDesigning the IBIS-AMS models for the high-speed DAC and ADC based SerDes IP running at 56Gbd, 112Gbd, 224Gbd, and 448GbdCreating Design Specification DocumentInteracting with and providing support to the system team, analog team, the digital team, the DSP team, the signal integrity team, the hardware team, firmware team, and the analog lab bring-up team.The Must Haves:Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc, MEng/MSc, or PhD levelDesign experience in the latest CMOS and BiCMOS technologyProficiency with Cadence Virtuoso/Xcelium/AMS, Synopsys VCS/StarRC, Siemens Questa/Formal/Calibre/SymphonyAMS/AFSFamiliarity with SystemVerilog, VerilogAMS, VerilogA, Matlab/Simulink, C/C++, Python languagesAbility to work independently and collaboratively with team membersSkills of writing and presenting in EnglishAssets:Knowledge of UVM, Git, Gradle, Google TestsExperience with the RF and Signal Integrity toolsDSP, digital, and analog design and modelling in high SerDes application.Pay Range:The annual pay range for this position is $83,900 - $134,100.Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.Not ready to apply? Join our Talent Community to get relevant job alerts straight to your inbox.At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.Ciena is anEqual Opportunity Employer, including disability and protected veteran status.If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.Emplois similaires(5)Analog Circuit Designer (Team Lead)locations 2emplacements time type Full time posted on Publié il y a 6 jour(s)Senior Digital ASIC Verification Engineerlocations Ottawa time type Full time posted on Publié il y a 29 jour(s)ASIC Mix-Signal Test Development Engineer (Automated Test Equipment (ATE))locations Ottawa time type Full time posted on Publié il y a plus de 30jours #J-18808-Ljbffr